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Introduction
Until now, verifying that timing in
33 MHz 64-bit PCI designs met the
setup and hold specification,
required either very tedious meas-
urements of all signals with a digi-
tal storage oscilloscope (DSO) or a
very high speed logic analyzer,
which is very costly. The timing
check feature of the E2920 PCI
Series Exerciser/Analyzer simulta-
neously monitors all 87 synchronous
bused PCI signals for both setup
and hold timing violations and
identifies suspect individual signals.
It works with your DSO to speed
up the timing verification process
not only by quickly telling you
which signals are violating timing,
but also triggering your scope when
a timing violation occurs.
Until now, verifying that timing in
33 MHz 64-bit PCI designs met the
setup and hold specification,
required either very tedious meas-
urements of all signals with a digi-
tal storage oscilloscope (DSO) or a
very high speed logic analyzer,
which is very costly. The timing
check feature of the E2920 PCI
Series Exerciser/Analyzer simulta-
neously monitors all 87 synchronous
bused PCI signals for both setup
and hold timing violations and
identifies suspect individual signals.
It works with your DSO to speed
up the timing verification process
not only by quickly telling you
which signals are violating timing,
but also triggering your scope when
a timing violation occurs.
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